Modern processing systems often rely on serial data transfer techniques to exchange data with other system components. For example, many personal computers use a USB port for communicating with peripheral devices. Although intuitively it would appear that serial data transfer is slower than parallel data transfer, serial transfer efficiency surpasses parallel transfer efficiency at higher data transfer rates. As data transfer rates increase, parallel transfer becomes more sensitive to small capacitances, mutual inductances, inter-symbol interference (ISI), and noise, all of which can reduce transfer speed and cause data distortion.
One drawback to serial data transfer, however, is that a processing system does not separately receive timing information with a data stream. Instead, the timing information is embedded within the data stream. When the processing system receives serial data, it needs to generate a clock signal from an approximate frequency reference and align the clock signal with the transitions in the received data stream. Unfortunately, as data transfer rates continue to increase, it becomes more and more difficult for a processing system to generate and align a clock signal, primarily because timing information must be captured and processed very quickly. Consequently, processing systems must include increasingly complex and thus expensive circuitry to accurately generate a clock signal to enable receipt of a serial data stream.